Difference between revisions of "S7-PCI315:Instruction set"
From IBHsoftec Wiki English
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! Instruction !! Operand !! Description | ! Instruction !! Operand !! Description | ||
|- | |- | ||
| − | |style="width: | + | |style="width: 6em"| A ||style="width: 6em"| ||style="width: 27em"| AND with a scan to "1" |
|- | |- | ||
| AN || || AND with a scan to "0" | | AN || || AND with a scan to "0" | ||
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! Operation !! Operand !! Description | ! Operation !! Operand !! Description | ||
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| − | |style="width: | + | |style="width: 6em"| A( ||style="width: 6em"| ||style="width: 27em"| AND left parenthesis |
|- | |- | ||
| AN( || || AND NOT left parenthesis | | AN( || || AND NOT left parenthesis | ||
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! Operation !! Operand !! Description | ! Operation !! Operand !! Description | ||
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| − | |style="width: | + | |style="width: 6em"| = ||style="width: 6em"| ||style="width: 27em"| Assign value of RLO |
|- | |- | ||
| S || || Set | | S || || Set | ||
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! Operation !! Operand !! Description | ! Operation !! Operand !! Description | ||
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| − | |style="width: | + | |style="width: 6em"| MCRA ||style="width: 6em"| ||style="width: 27em"| Activate MCR |
|- | |- | ||
| MCRD || || Deactivate MCR | | MCRD || || Deactivate MCR | ||
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! Operation !! Operand !! Description | ! Operation !! Operand !! Description | ||
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| − | |style="width: | + | |style="width: 6em"| L ||style="width: 6em"| ||style="width: 27em"| Load operand |
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| T || || Transfer operand | | T || || Transfer operand | ||
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! Operation !! Operand !! Description | ! Operation !! Operand !! Description | ||
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| − | |style="width: | + | |style="width: 6em"| L ||style="width: 6em"| PIB ||style="width: 27em"| Load peripheral input byte |
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| L || PIW || Load peripheral input word | | L || PIW || Load peripheral input word | ||
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! Operation !! Operand !! Description | ! Operation !! Operand !! Description | ||
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| − | |style="width: | + | |style="width: 6em"| PUSH ||style="width: 6em"| ||style="width: 27em"| Push accumulators upwards |
|- | |- | ||
| POP || || Push accumulators downwards | | POP || || Push accumulators downwards | ||
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! Operation !! Operand !! Description | ! Operation !! Operand !! Description | ||
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| − | |style="width: | + | |style="width: 6em"| SLW ||style="width: 6em"| ||style="width: 27em"| Shift ACCU1-L left (word shift) |
|- | |- | ||
| SLD || || Shift ACCU1 left (double word shift) | | SLD || || Shift ACCU1 left (double word shift) | ||
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! Operation !! Operand !! Description | ! Operation !! Operand !! Description | ||
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| − | |style="width: | + | |style="width: 6em"| SP ||style="width: 6em"| T ||style="width: 27em"| Start as impulse |
|- | |- | ||
| SE || T || Start as extended impulse | | SE || T || Start as extended impulse | ||
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! Operation !! Operand !! Description | ! Operation !! Operand !! Description | ||
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| − | |style="width: | + | |style="width: 6em"| CU ||style="width: 6em"| C ||style="width: 27em"| Count up (increment) |
|- | |- | ||
| CD || C || Count down (decrement) | | CD || C || Count down (decrement) | ||
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! Operation !! Operand !! Description | ! Operation !! Operand !! Description | ||
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| − | |style="width: | + | |style="width: 6em"| AW ||style="width: 6em"| ||style="width: 27em"| AND ACCU1-L (AND word) |
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| AD || || AND ACCU1 (AND double word) | | AD || || AND ACCU1 (AND double word) | ||
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! Operation !! Operand !! Description | ! Operation !! Operand !! Description | ||
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| − | |style="width: | + | |style="width: 6em"| ==I ||style="width: 6em"| ||style="width: 27em"| Integer values equal |
|- | |- | ||
| <>I || || Integer values unequal | | <>I || || Integer values unequal | ||
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! Operation !! Operand !! Description | ! Operation !! Operand !! Description | ||
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| − | |style="width: | + | |style="width: 6em"| ITD ||style="width: 6em"| ||style="width: 27em"| Convert integer to double integer |
|- | |- | ||
| ITB || || Convert integer to BCD | | ITB || || Convert integer to BCD | ||
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! Operation !! Operand !! Description | ! Operation !! Operand !! Description | ||
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| − | |style="width: | + | |style="width: 6em"| JU ||style="width: 6em"| Destination ||style="width: 27em"| Jump unconditional |
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| JC || Destination || Jump if RLO = 1 | | JC || Destination || Jump if RLO = 1 | ||
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! Operation !! Operand !! Description | ! Operation !! Operand !! Description | ||
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| − | |style="width: | + | |style="width: 6em"| CALL FB ||style="width: 6em"| ||style="width: 27em"| Unconditional call of an FB with parameter transfer |
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| CALL FC || || Unconditional call of an FC with parameter transfer | | CALL FC || || Unconditional call of an FC with parameter transfer | ||
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! Operation !! Operand !! Funktionsbeschreibung | ! Operation !! Operand !! Funktionsbeschreibung | ||
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| − | |style="width: | + | |style="width: 6em"| LAR1 ||style="width: 6em"| ||style="width: 27em"| Load AR1 |
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| LAR2 || || Load AR2 | | LAR2 || || Load AR2 | ||
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! Operation !! Operand !! Funktionsbeschreibung | ! Operation !! Operand !! Funktionsbeschreibung | ||
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| − | |style="width: | + | |style="width: 6em"| NOP ||style="width: 6em"| 0 ||style="width: 27em"| Null operation instruction |
|- | |- | ||
| NOP || 1 || Null operation instruction | | NOP || 1 || Null operation instruction | ||
Revision as of 11:11, 6 August 2012
Contents
- 1 S7-PCI315 instruction set
- 2 Bit logic instructions
- 3 Other boolean logic instructions
- 4 Master Control Relay
- 5 Load / Transfer instructions
- 6 Peripheral access instructions
- 7 Shift and rotating instructions
- 8 Timer instructions
- 9 Block call instructions
- 10 Program display and null operation instructions
S7-PCI315 instruction set
The S7-PCI315 PLC has the complete instruction set of the SIMATIC® S7-315 PLC.
Bit logic instructions
| Instruction | Operand | Description |
|---|---|---|
| A | AND with a scan to "1" | |
| AN | AND with a scan to "0" | |
| O | OR with scan to "1" | |
| ON | OR with scan to "0" | |
| X | Exclusive-OR with a scan to "1" | |
| XN | Exclusive-OR with a scan to "0" | |
| I | of an input | |
| Q | of an output | |
| M | of a memory flag | |
| L | of a local data bit | |
| T | of a timer | |
| C | of a counter | |
| DBX | of a data bit | |
| DIX | of an instance data bit | |
| ==0 | result equal zero | |
| <>0 | result unequal zero | |
| >0 | result greater than zero | |
| >=0 | result greater or equal zero | |
| <0 | result less than zero | |
| <=0 | result less or equal zero | |
| UO | invalid result | |
| OV | overflow | |
| OS | Überoverflow (saved) | |
| BR | binary result |
Other boolean logic instructions
| Operation | Operand | Description |
|---|---|---|
| A( | AND left parenthesis | |
| AN( | AND NOT left parenthesis | |
| O( | OR left parenthesis | |
| ON( | OR NOT left parenthesis | |
| X( | Exclusive OR left parenthesis | |
| XN( | Exclusive OR NOT left parenthesis | |
| ) | Right parenthesis | |
| O | OR-ing AND operations | |
| NOT | Negate RLO | |
| SET | Set RLO to "1" | |
| CLR | Set RLO to "0" | |
| SAVE | Save RLO to the BR bit |
| Operation | Operand | Description |
|---|---|---|
| = | Assign value of RLO | |
| S | Set | |
| R | Reset | |
| FP | Positive edge detection | |
| FN | Negative edge detection | |
| I | of an input bit | |
| Q | of an output bit | |
| M | of a flag memory bit | |
| L | of a local data bit | |
| DBX | of a data bit | |
| DIX | of an instance data bit |
Master Control Relay
| Operation | Operand | Description |
|---|---|---|
| MCRA | Activate MCR | |
| MCRD | Deactivate MCR | |
| MCR( | Open MCR zone | |
| )MCR | Close MCR zone |
Load / Transfer instructions
| Operation | Operand | Description |
|---|---|---|
| L | Load operand | |
| T | Transfer operand | |
| IB | InpuInput byte | |
| IW | Input word | |
| ID | Input double word | |
| QB | Output byte | |
| QW | Output word | |
| QD | Output double word | |
| MB | Memory byte | |
| MW | Memory word | |
| MD | Memory double word | |
| LB | Local data byte | |
| LW | Local data word | |
| LD | Local data double word | |
| DBB | Data block byte | |
| DBW | Data block word | |
| DBD | Data block double word | |
| DIB | Instance data block byte | |
| DIW | Instance data block word | |
| DID | Instance data block double word | |
| STW | Status word | |
| L | Const | Load constant value |
| L | #Pointer | Load pointer |
| L | T | Timer |
| LC | T | Timer (BCD coded) |
| L | C | Counter |
| LC | C | Counter (BCD coded) |
| L | DBNO | Data block number |
| L | DBLG | Data block length |
| L | DINO | Instance data block number |
| L | DILG | Instance data block length |
Peripheral access instructions
| Operation | Operand | Description |
|---|---|---|
| L | PIB | Load peripheral input byte |
| L | PIW | Load peripheral input word |
| L | PID | Load peripheral input double word |
| T | PQB | Transfer peripheral output byte |
| T | PQW | Transfer peripheral output word |
| T | PQD | Transfer peripheral output double word |
Accumulator instructions
| Operation | Operand | Description |
|---|---|---|
| PUSH | Push accumulators upwards | |
| POP | Push accumulators downwards | |
| ENT | Push accumulators (without A1) A2->A3, A3->A4 | |
| LEAVE | Push accumulators (without A1) A4->A3, A3->A2 | |
| TAK | Change ACCU1 with ACCU2 | |
| CAW | Change ACCU1 bytes 0 and 1 | |
| CAD | Change ACCU1 bytes 0 and 3, 1 and 2 |
Shift and rotating instructions
| Operation | Operand | Description |
|---|---|---|
| SLW | Shift ACCU1-L left (word shift) | |
| SLD | Shift ACCU1 left (double word shift) | |
| SRW | Shift ACCU1-L right (word shift) | |
| SRD | Shift ACCU1 right (double word shift) | |
| SSI | Shift ACCU1-L right (word shift with sign) | |
| SSD | Shift ACCU1 right (double word shift with sign) | |
| RLD | Rotate ACCU1 left (double word) | |
| RLDA | Rotate ACCU1 left through CC1 | |
| RRDA | Rotate ACCU1 right through CC1 | |
| RRD | Rotate ACCU1 right (double word) | |
| Const | Number of places to shift/rotate | |
| Number of places to shift/rotate located in ACCU2 |
Timer instructions
| Operation | Operand | Description |
|---|---|---|
| SP | T | Start as impulse |
| SE | T | Start as extended impulse |
| SD | T | Start as ON-delay |
| SS | T | Start as saving ON-delay |
| SF | T | Start as OFF-delay |
| R | T | Reset timer |
| FR | T | Enable timer |
Counter instructions
| Operation | Operand | Description |
|---|---|---|
| CU | C | Count up (increment) |
| CD | C | Count down (decrement) |
| S | C | Set counter |
| R | C | Reset counter |
| FR | C | Enable counter |
Word instructions
| Operation | Operand | Description |
|---|---|---|
| AW | AND ACCU1-L (AND word) | |
| AD | AND ACCU1 (AND double word) | |
| OW | OR ACCU1-L (OR word) | |
| OD | OR ACCU1 (OR double word) | |
| XOW | Exclusive-OR ACCU (XOR word) | |
| XOD | ExkExclusive-OR ACCU (XOR double word) | |
| Const | with a word or double word constant | |
| with ACCU2 |
Arithmetic instructions
| Operation | Operand | Description |
|---|---|---|
| ==I | Integer values equal | |
| <>I | Integer values unequal | |
| >I | Integer values greater | |
| >=I | Integer values greater or equal | |
| <I | Integer values less | |
| <=I | Integer values less or equal | |
| ==D | Double integer values equal | |
| <>D | Double integer values unequal | |
| >D | Double integer values greater | |
| >=D | Double integer values greater or equal | |
| <D | Double integer values less | |
| <=D | Double integer values less or equal | |
| ==R | Real values equal | |
| <>R | Real values unequal | |
| >R | Real values greater | |
| >=R | Real values greater or equal | |
| <R | Real values less | |
| <=R | Real values less or equal | |
| SIN | Sine of a real value | |
| COS | Cosine of a real value | |
| TAN | Tangent of a real value | |
| ASIN | Arcsine of a real value | |
| ACOS | Arccosine of a real value | |
| ATAN | Arctanget of a real value | |
| SQR | Square a real value | |
| SQRT | Square root a real value | |
| EXP | e to the power of a real value | |
| LN | Natural logarithm of a real value | |
| +I | Integer addition | |
| -I | Integer subtraction | |
| *I | Integer multiplication | |
| /I | Integer division | |
| +D | Double-integer addition | |
| -D | Double-integer subtraction | |
| *D | Double-integer multiplication | |
| /D | Double-integer division | |
| +R | Real addition | |
| -R | Real subtraction | |
| *R | Real multiplication | |
| /R | Real division | |
| MOD | Double integer division (modulo) | |
| + | Const | Add a constant |
| +P# | Const | Add a pointer |
| DEC | decrement ACCU1-LL (one byte) | |
| INC | increment ACCU1-LL (one byte) |
Data type conversion instructions
| Operation | Operand | Description |
|---|---|---|
| ITD | Convert integer to double integer | |
| ITB | Convert integer to BCD | |
| DTB | Convert double integer to BCD | |
| DTR | Convert double integer to real | |
| BTI | Convert BCD to integer | |
| BTD | Convert BCD to double integer | |
| RND | Convert real to double integer (round) | |
| RND+ | Convert real to double integer (round up) | |
| RND- | Convert real to double integer (round down) | |
| TRUNC | Convert real to double integer (truncate) | |
| INVI | Invert ACCU1-L (integer) | |
| INVD | Invert ACCU1 (double integer) | |
| NEGI | Negate ACCU1-L (integer) | |
| NEGD | Negate ACCU1 (double integer) | |
| NEGR | Negate ACCU1 (real) | |
| ABS | REAbsolute value (real) |
Jump instructions
| Operation | Operand | Description |
|---|---|---|
| JU | Destination | Jump unconditional |
| JC | Destination | Jump if RLO = 1 |
| JCB | Destination | Jump if RLO = 1 (save RLO) |
| JCN | Destination | Jump if RLO = 0 |
| JNB | Destination | Jump if RLO = 0 (save RLO) |
| JBI | Destination | Jump if BR = 1 |
| JNBI | Destination | Jump if BR = 0 |
| JZ | Destination | Jump if compare result = 0 |
| JN | Destination | Jump if compare result ≠ 0 |
| JP | Destination | Jump if compare result > 0 |
| JPZ | Destination | Jump if compare result >= 0 |
| JM | Destination | Jump if compare result < 0 |
| JMZ | Destination | Jump if compare result <= 0 |
| JUO | Destination | Jump if compare result "Unordered Math Instruction" |
| JO | Destination | Jump on overflow |
| JOS | Destination | Jump on saved overflow |
| JL | Destination | Jump distributor |
| LOOP | Destination | Loop programming (decrement ACCU1-L and jump if ≠ 0 |
Block call instructions
| Operation | Operand | Description |
|---|---|---|
| CALL FB | Unconditional call of an FB with parameter transfer | |
| CALL FC | Unconditional call of an FC with parameter transfer | |
| CALL SFB | Unconditional call of an SFB with parameter transfer | |
| CALL SFC | Unconditional call of an SFC with parameter transfer | |
| UC FB | Unconditional call of an FB without parameter transfer | |
| CC FB | Conditional call of an FB without parameter transfer | |
| UC FC | Unconditional call of an FC without parameter transfer | |
| CC FC | Conditional call of an FC without parameter transfer | |
| BEU | End block unconditionally | |
| BEC | End block conditionally (RLO = 1) | |
| BE | End block | |
| OPN | DB | Open data block |
| DI | Open instance data block | |
| TDB | Exchange data block registers |
Indirect adressing instructions
| Operation | Operand | Funktionsbeschreibung |
|---|---|---|
| LAR1 | Load AR1 | |
| LAR2 | Load AR2 | |
| MD | with memory double word | |
| LD | with local data double word | |
| DBD | with datablock double word | |
| DID | with instance data block double word | |
| LAR1 | Load AR1 with ACCU1 | |
| LAR2 | Load AR2 with ACCU1 | |
| LAR1 | AR2 | Load AR1 with AR2 |
| LAR1 | P# | Load AR1 with pointer |
| LAR2 | P# | Load AR2 with pointer |
| TAR1 | Transfer in AR1 | |
| TAR2 | Transfer in AR2 | |
| MD | in memory double word | |
| LD | in local data double word | |
| DBD | in datablock double word | |
| DID | in instance data block double word | |
| TAR1 | Transfer AR1 in ACCU1 | |
| TAR2 | Transfer AR2 in ACCU1 | |
| TAR1 | AR2 | Transfer AR1 in AR2 |
| TAR | Swap AR1 with AR2 | |
| +AR1 | Add ACCU1 to AR1 | |
| +AR2 | Add ACCU1 to AR2 | |
| +AR1 | P# | Add pointer to AR1 |
| +AR2 | P# | Add pointer to AR2 |
Program display and null operation instructions
| Operation | Operand | Funktionsbeschreibung |
|---|---|---|
| NOP | 0 | Null operation instruction |
| NOP | 1 | Null operation instruction |
| BLD | Const | Program display instruction (null operation) |
