Difference between revisions of "S7-SoftPLC:Instruction set"
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! Operation !! Operand !! Description | ! Operation !! Operand !! Description | ||
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− | |style="width: 5em"| JU ||style="width: 5em"| goal ||style="width: | + | |style="width: 5em"| JU ||style="width: 5em"| goal ||style="width: 26em"| Jump unconditional |
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| JC || goal || Jump if RLO = 1 | | JC || goal || Jump if RLO = 1 | ||
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− | + | == Block call instructions == | |
{| class="wikitable" | {| class="wikitable" | ||
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! Operation !! Operand !! Description | ! Operation !! Operand !! Description | ||
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− | |style="width: 5em"| CALL FB ||style="width: 5em"| ||style="width: | + | |style="width: 5em"| CALL FB ||style="width: 5em"| ||style="width: 26em"| Unconditional call of an FB with parameter transfer |
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| CALL FC || || Unconditional call of an FC with parameter transfer | | CALL FC || || Unconditional call of an FC with parameter transfer | ||
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|} | |} | ||
− | + | == Indirect adressing instructions == | |
{| class="wikitable" | {| class="wikitable" | ||
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− | + | == Program display and null operation instructions == | |
{| class="wikitable" | {| class="wikitable" |
Latest revision as of 13:01, 23 January 2013
The programming language of the IBHsoftec S7-SoftPLC 315and S7-SoftPLC 416 controls is STEP®7 and can be made with the programming tools S7 for Windows® or STEP®7 from Siemens. The complete instruction set of the STEP®7 language is supported.
The S7-SoftPLC 315 has the complete instruction set of the SIMATIC® S7-315 CPU.
The S7-SoftPLC 416 has the complete instruction set of the SIMATIC® S7-416 CPU.
Contents
- 1 Bit logic instructions
- 2 Other boolean logic instructions
- 3 Master Control Relay
- 4 Load / Transfer instructions
- 5 Peripheral access instructions
- 6 Accumulator instructions
- 7 Shift and rotating instructions
- 8 Timer instructions
- 9 Counter instructions
- 10 Word instructions
- 11 Arithmetic instructions
- 12 Data type conversion instructions
- 13 Jump instructions
- 14 Block call instructions
- 15 Indirect adressing instructions
- 16 Program display and null operation instructions
Bit logic instructions
Instruction | Operand | Description |
---|---|---|
A | AND with a scan to "1"“ | |
AN | AND with a scan to "0" | |
O | OR with scan to "1" | |
ON | OR with scan to "0" | |
X | Exclusive-OR with a scan to "1" | |
XN | Exclusive-OR with a scan to "0" | |
I | of an input | |
Q | of an output | |
M | of a memory | |
L | of a local data bit | |
T | of a timer | |
C | of a counter | |
DBX | of a data bit | |
DIX | of an instant data bit | |
==0 | result equal zero | |
<>0 | result unequal zero | |
>0 | result greater than zero | |
>=0 | result greater or equal zero | |
<0 | result less than zero | |
<=0 | result less or equal zero | |
UO | invalid result | |
OV | overflow | |
OS | overflow (saving) | |
BR | binary result |
Other boolean logic instructions
Operation | Operand | Description |
---|---|---|
A( | AND left parenthesis | |
AN( | AND NOT left parenthesis | |
O( | OR left parenthesis | |
ON( | OR NOT left parenthesis | |
X( | Exclusive OR left parenthesis | |
XN( | Exclusive OR NOT left parenthesis | |
) | Right parenthesis | |
O | OR-ing AND operations | |
NOT | Negate RLO | |
SET | Set RLO to "1" | |
CLR | Set RLO to "0" | |
SAVE | Save RLO to the BR bit |
Operation | Operand | Description |
---|---|---|
= | Assign value of RLO | |
S | Set | |
R | Reset | |
FP | Positive edge detection | |
FN | Negative edge detection | |
I | of an input bit | |
Q | of an output bit | |
M | of a memory bit | |
L | of a local data bit | |
DBX | of a data bit | |
DIX | of a instance data bit |
Master Control Relay
Operation | Operand | Description |
---|---|---|
MCRA | Activate MCR | |
MCRD | Deactivate MCR | |
MCR( | Open MCR zone | |
)MCR | Close MCR zone |
Load / Transfer instructions
Operation | Operand | Description |
---|---|---|
L | Load operand | |
T | Transfer operand | |
IB | Input byte | |
IW | Input word | |
ID | Input double word | |
QB | Output byte | |
QW | Output word | |
QD | Ouput double word | |
MB | Memory byte | |
MW | Memory word | |
MD | Memory double word | |
LB | Local data byte | |
LW | Local data word | |
LD | Local data double word | |
DBB | Data block byte | |
DBW | Data block word | |
DBD | Data block double word | |
DIB | Instance data block byte | |
DIW | Instance data block word | |
DID | Instance data block double word | |
STW | Status word | |
L | const | Load constant value |
L | #Pointer | Load pointer |
L | T | Timer |
LC | T | Timer (BCD coded) |
L | Z | Counter |
LC | Z | Counter (BCD coded) |
L | DBNO | Data block number |
L | DBLG | Data block length |
L | DINO | Instance data block number |
L | DILG | Instance data block length |
Peripheral access instructions
Operation | Operand | Description |
---|---|---|
L | PIB | Load peripheral input byte |
L | PIW | Load peripheral input word |
L | PID | Load peripheral input double word |
T | PQB | Transfer peripheral output byte |
T | PQW | Transfer peripheral output word |
T | PQD | Transfer peripheral output double word |
Accumulator instructions
Operation | Operand | Description |
---|---|---|
PUSH | Push accumulators upwards | |
POP | Push accumulators downwards | |
ENT | Push accumulators (without A1) A2->A3, A3->A4 | |
LEAVE | Push accumulators (without A1) A4->A3, A3->A2 | |
TAK | Change ACCU1 with ACCU2 | |
CAW | Change ACCU1 bytes 0 and 1 | |
CAD | Change ACCU1 bytes 0 and 3, 1 and 2 |
Shift and rotating instructions
Operation | Operand | Description |
---|---|---|
SLW | Shift ACCU1-L left (word shift) | |
SLD | Shift ACCU1 left (double word shift) | |
SRW | Shift ACCU1-L right (word shift) | |
SRD | Shift ACCU1 right (double word shift) | |
SSI | Shift ACCU1-L right (word shift with sign) | |
SSD | Shift ACCU1 right (double word shift with sign) | |
RLD | Rotate ACCU1 left (double word) | |
RLDA | Rotate ACCU1 left through CC1 | |
RRDA | Rotate ACCU1 right through CC1 | |
RRD | Rotate ACCU1 right (double word) | |
const | Number of places to shift/rotate | |
- | Number of places to shift/rotate located in ACCU2 |
Timer instructions
Operation | Operand | Description |
---|---|---|
SP | T | Start as impulse |
SE | T | Start as extendet impulse |
SD | T | Start as ON-delay |
SS | T | Start as saving ON-delay |
SF | T | Start as OFF-delay |
R | T | Reset timer |
FR | T | Enable timer |
Counter instructions
Operation | Operand | Description |
---|---|---|
CU | C | Count up (increment) |
CD | C | Count down (decrement) |
S | C | Set counter |
R | C | Reset counter |
FR | C | Enable counter |
Word instructions
Operation | Operand | Description |
---|---|---|
AW | AND ACCU1-L (AND word) | |
AD | AND ACCU1 (AND double word) | |
OW | OR ACCU1-L (OR word) | |
OD | OR ACCU1 (OR double word) | |
XOW | Exclusive-OR ACCU (XOR word) | |
XOD | Exclusive-OR ACCU (XOR double word) | |
const | with a word or double word constant | |
- | with ACCU2 |
Arithmetic instructions
Operation | Operand | Description |
---|---|---|
==I | Integer values equal | |
<>I | Integer values unequal | |
>I | Integer values greater | |
>=I | Integer values greather or equal | |
<I | Integer values less | |
<=I | Integer values less or equal | |
==D | Double integer values equal | |
<>D | Double integer values unequal | |
>D | Double integer values greater | |
>=D | Double integer values greater or equal | |
<D | Double integer values less | |
<=D | Double integer values less or equal | |
==R | Real values equal | |
<>R | Real values unequal | |
>R | Real values greater | |
>=R | Real values greater or equal | |
<R | Real values less | |
<=R | Real values less or equal | |
SIN | Sine of a real value | |
COS | Cosine of a real value | |
TAN | Tangent of a real value | |
ASIN | Arcsine of a real value | |
ACOS | Arccosine of a real value | |
ATAN | Arctangent of a real value | |
SQR | Square a real value | |
SQRT | Square root a real value | |
EXP | e to the power of a real value | |
LN | Natural logarithm of a real value | |
+I | Integer addition | |
-I | Integer subtraction | |
*I | Integer multiplication | |
/I | Integer division | |
+D | Double-integer addition | |
-D | Double-integer subtraction | |
*D | Double-integer multiplication | |
/D | Double-integer division | |
+R | Real addition | |
-R | Real subtraction | |
*R | Real multiplication | |
/R | Real division | |
MOD | Double integer division (modulo) | |
+ | const | Add a constant |
+P# | const | Add a pointer |
DEC | dekrement ACCU1-LL (one byte) | |
INC | inkrement ACCU1-LL (one byte) |
Data type conversion instructions
Operation | Operand | Description |
---|---|---|
ITD | Convert integer to double integer | |
ITB | Convert integer to BCD | |
DTB | Convert double integer to BCD | |
DTR | Convert double integer to real | |
BTI | Convert BCD to integer | |
BTD | Convert BCD to double integer | |
RND | Convert real to double integer (round) | |
RND+ | Convert real to double integer (round up) | |
RND- | Convert real to double integer (round down) | |
TRUNC | Convert real to double integer (truncate) | |
INVI | Invert ACCU1-L (integer) | |
INVD | Invert ACCU1 (double integer) | |
NEGI | Negate ACCU1-L (integer) | |
NEGD | Negate ACCU1 (double integer) | |
NEGR | Negate ACCU1 (real) | |
ABS | Absolute value (real) |
Jump instructions
Operation | Operand | Description |
---|---|---|
JU | goal | Jump unconditional |
JC | goal | Jump if RLO = 1 |
JCB | goal | Jump if RLO = 1 (save RLO) |
JCN | goal | Jump if RLO = 0 |
JNB | goal | Jump if RLO = 0 (save RLO) |
JBI | goal | Jump if BR = 1 |
JNBI | goal | Jump if BR = 0 |
JZ | goal | Jump if compare result = 0 |
JN | goal | Jump if compare result != 0 |
JP | goal | Jump if compare result > 0 |
JPZ | goal | Jump if compare result >= 0 |
JM | goal | Jump if compare result < 0 |
JMZ | goal | Jump if compare result <= 0 |
JUO | goal | Jump if compare result "Unordered Math Instruction" |
JO | goal | Jump on overflow |
JOS | goal | Jump on saving overflow |
JL | goal | Jump distributor |
LOOP | goal | Loop programming (decrement ACCU1-L and jump if != 0 |
Block call instructions
Operation | Operand | Description |
---|---|---|
CALL FB | Unconditional call of an FB with parameter transfer | |
CALL FC | Unconditional call of an FC with parameter transfer | |
CALL SFB | Unconditional call of an SFB with parameter transfer | |
CALL SFC | Unconditional call of an SFC with parameter transfer | |
UC FB | Unconditional call of an FB without parameter transfer | |
CC FB | Conditional call of an FB without parameter transfer | |
UC FC | Unconditional call of an FC without parameter transfer | |
CC FC | Conditional call of an FC without parameter transfer | |
BEU | End block unconditionally | |
BEC | End block conditionally (RLO = 1) | |
BE | End block | |
OPN | ||
DB | Open data block | |
DI | Open instance data block | |
TDB | Exchange data block registers |
Indirect adressing instructions
Operation | Operand | Description |
---|---|---|
LAR1/LAR2 | Load AR1/AR2 | |
MD | with memory double word | |
LD | with local data double word | |
DBD | with datablock double word | |
DID | with instance data block double word | |
LAR1 | - | Load AR1 with ACCU1 |
LAR2 | - | Laod AR2 with ACCU1 |
LAR1 | AR2 | Load AR1 with AR2 |
LAR1 | P# | Load AR1 with pointer |
LAR2 | P# | Load AR2 with pointer |
TAR1/TAR2 | Transfer in AR1/AR2 | |
MD | in memory double word | |
LD | in local data double word | |
DBD | in datablock double word | |
DID | in instance data block double word | |
TAR1 | - | Transfer AR1 in ACCU1 |
TAR2 | - | Transfer AR2 in ACCU1 |
TAR1 | AR2 | Transfer AR1 in AR2 |
TAR | Swap AR1 with AR2 | |
+AR1 | Add ACCU1 to AR1 | |
+AR2 | Add ACCU1 to AR2 | |
+AR1 | P# | Add pointer to AR1 |
+AR2 | P# | Add pointer to AR2 |
Program display and null operation instructions
Operation | Operand | Description |
---|---|---|
NOP | 0 | Null operation instruction |
NOP | 1 | Null operation instruction |
BLD | const | Program display instruction (null operation) |
Layout of S7-SoftPLC memory
The memory of S7-SoftPLC 315 and S7-SoftPLC 416 is compatible to the memory of SIMATIC®-control S7-315 or S7-416.
Please note, that the low-order byte has to be interchanged with the high-order byte when accessing this memory with Windows programs.
Layout of SoftPLC system data
The layout of the system data in the system data is compatible to the system data of SIMATIC®-control S7-315 or S7-416.
Integrated organisation blocks
The organisation blocks, listed in the chart below, are executed, if they are programmed:
OB no | Short Description |
---|---|
OB 1 | Main programm |
OB 10 – OB 17 | Time alarm |
OB 20 – OB 23 | Delay alarm |
OB 30 – OB 38 | Time blocks (cyclic call) |
OB 80 – OB 87 | Error blocks |
OB 90 | Background execution |
OB 100/OB 101 | Warm or hot restart |
OB 121/OB 122 | Programming faults |
Integrated system functions
All system functions (SFC) relevant for a Software PLC are integrated in S7-SoftPLC.
The chart below shows the available SFCs(in numeric listing)
SFC no | SF name | Short Description |
---|---|---|
SFC 0 | SET_CLK | Set system clock |
SFC 1 | READ_CLK | Read system clock |
SFC 5 (3) | GADR_LGC | Detect the logic basis address of a component |
SFC 6 | RD_SINFO | Read out start information of actual OBs |
SFC 13 (1) | DPNRM_DG | Slave-Diagnosis of a DP-slave |
SFC 14 (2) | DPRD_DAT | Read consistent data of a DP-norm slave |
SFC 15 (2) | DPWR_DAT | Write data consistent on DP-norm slave |
SFC 20 | BLKMOV | Copy PLC-variable in target-area |
SFC 21 | FILL | Preoccupy PLC-variable in target-area |
SFC 22 | CREAT_DB | Create data block |
SFC 23 | DEL_DB | Delete data block |
SFC 24 | TEST_DB | Test attributes of a data block |
SFC 25 | COMPRESS | Compress load memory |
SFC 28 | SET_TINT | Set time alarm |
SFC 29 | CAN_TINT | Stop time alarm (do not execute) |
SFC 30 | ACT_TINT | Enable time alarm |
SFC 31 | QRY_TINT | Status of time alarm |
SFC 32 | SRT_DINT | Start delay alarm |
SFC 33 | CAN_DINT | Stop delay alarm |
SFC 34 | QRY_DINT | Status query of delay alarm |
SFC 36 | MSK_FLT | Mask a synchron error occurrence |
SFC 37 | DMSK_FLT | Demask a synchron error occurrence |
SFC 38 | READ_ERR | Read out the occurrence status register |
SFC 39 | DIS_IRT | Locking the asynchron and alarm error processing |
SFC 40 | EN_IRT | Enable the asynchron and alarm error processing |
SFC 41 | DIS_AIRT | Delay high-priority asynchron and alarm error processing |
SFC 42 | EN_AIRT | Enable high-priority asynchron and alarm error processing |
SFC 43 | RE_TRIGR | Retrigger the Watchdog |
SFC 46 | STP | CPU operating state STOP |
SFC 49 (3) | LGC_GADR | Detect the solt of a logic address |
SFC 50 (3) | RD_LAGADR | Detect all logic addresses of a component |
SFC 51 | RDSYST | Read out system status list (SSL) |
SFC 64 | TIME_TCK | Timer Tick |
SFC 81 | UBLKMOV | Block Move, that can not be stopped |
(1)The SFC 13 is available only, when the driver Cifcfg.dll is loaded. Furthermore it can only return valid results, if the PROFIBUS® configuration has been created via the S7 for Windows® hardware configuration or the STEP®7 hardware configuration. This is only possible when using the driver CIFCFG.DLL.
(2)The SFC 14 and SFC 15 are available only, if they are loaded via the driver CIF30D0.DLL or the driver CIFCFG.DLL.
(3)The SFCs can only return valid results, if the PROFIBUS®7 configuration has been created via the S7 for Windows®7 hardware configuration or the STEP®7 hardware configuration. This is only possible when using the driver CIFCFG.DLL.
Integrated system blocks
The system blocks (SFB) relevant for a software PLC are integrated in S7-SoftPLC.
The following system function blocks are supported:
SFB no | SFB name | Short Description |
---|---|---|
SFB 0 | CTU | Count up |
SFB 1 | CTD | Count down |
SFB 2 | CTUD | Count up and down |
SFB 3 | TP | Generate pulse |
SFB 4 | TON | Generate ON-delay |
SFB 5 | TOF | Generate OFF-delay |
SFB 32 | DRUM | Implement sequencer |
SFB 52 (4) | RDREC_DP | Read data record |
SFB 53 (4) | WRREC_DP | Write data record |
(4)The SFB 52 and SFB 53 are only available if the driver CIFCFG.DLL is loaded and the entry DPV1=1 is set.